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netpp – minimizing workflows for smart networked devices

  • XML device description language
  • Generate System on Chip, code and documentation with a oneliner: make all
  • Maintain large number of device classes
  • network property protocol: All devices can speak to each other
  • Conduct unit tests of hardware, software, and documentation builds in the cloud, if necessary

‘IoF’: Internet of FPGAs

A Test&Measurement sensor platform and evaluation kit for netpp on FPGA

netpp node
netpp node

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Highlights:

  • Functional safety and full simulation model of hardware and software
  • Full remote control operating system on chip (no external RAM required)
  • Real time capable using programmable peripherals on FPGA
  • In-System upgrade: FPGA image can be downloaded over network
  • Flexible analog I/O with different msp430 (as ‘smart ADC’) population options
  • Support for Python and LabVIEW
  • New: Ready for the next generation: RISC-V support (rv32ui/c) working (full verification incomplete)

Documentation:

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