Virtual SoC debugging

2011, 2012 // Martin Strubel hackfin#21343234#section5.ch

These are a few flash format recordings of debugging sessions. They demonstrate the power of co-simulation based on a ZPU soft core integrated into the FPGA design. The following software tools are used (Linux):

• The GHDL simulator: http://ghdl.free.fr/
• GNU debugger port for ZPU (zpu-elf-gdb)
• GTKwave

1. Compiling and running the simulation

2. Connecting with GDB

4a. Inspecting I/O accesses

4b. Verifying 'write data'

5. Interactive I/O with gdb scripting

6. Triggering a (virtual) interrupt